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Test of computer architecture P5

In this test, the network administrator will continue to send you a multiple-choice questionnaire on computer architecture. Hopefully, with the following questions, readers will be given more useful knowledge about this topic.

  • Question 1. Strip integer representation, n bit in computer is:
    • 2 (n - 1) -> 2 (n - 1)

    • 2.n - 1 -> 2.n +1

    • 2n - 1 -> 2n - 1 - 1
  • Question 2. For unsigned numbers, the addition on the computer gives false results when:
    • Add two positive numbers, give negative results

      1. Add two negative numbers, giving positive results
    • Have to remember out of the highest bit

    • Both A and B
  • Question 3. The main task of the ALU is:
    • Perform addition

      1. As the input of the cumulative register
    • Change logic or arithmetic of data words
    • All jobs are told here
  • Question 4. Most arithmetic and logic operations in microprocessors perform operations between the contents of the device or the contents of the register with:
    • Accumulated register A fc

    • PC

    • Memory address register

    • Command register

  • Question 5. The main purpose of the temporary register:
    • Connect the ALU to the internal data bus of the CPU
    • Connect the register to the total register
    • Separate the input and output of ALU
    • Make sure to save the data of the total register
  • Question 6. While executing a command, the command register (IR) stores the command:
    • Before

    • Now

    • Later

    • Always

  • Sentence 7. The first 640 KB of memory is called:
      1. Memory expansion
    • Conventional memory
      1. Memory paging
    • Upper memory

  • Question 8. For ROM memory, which of the following statements is true:
      1. Can use electricity to delete PROM
      1. PROM is a type of ROM that can be erased and recorded many times
    • EPROM is a type of ROM that can be erased and recorded many times

      1. Can use electricity to delete EPROM
  • Question 9. For the SRAM memory chip with a capacity of 16K x 8 bits, the following statement is true:
    • The address lines are: A0 -> A13
      1. The address lines are: D0 -> D13
      1. The data lines are: A0 -> A14
      1. The data lines are: D1 -> D8
  • Question 10. Cache L1 Cache and L2 Cache are fabricated by:
      1. SDRAM
    • SRAM
      1. DRAM
      1. DDRAM

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Isabella Humphrey

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Isabella Humphrey
Update 24 May 2019