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Testing of computer architecture - Part 2

  1. Question 1. In the computer, disconnecting NMI is:

    1. Interrupting the exception is unsure

    2. Soft breaker can't block

    3. Hard break is not possible

    4. Soft shut off

  2. Question 2. When the processor is executing the program, if interrupted (not banned) is sent, it:

    1. Finish the program and then perform an interrupt

    2. Refuse to disconnect, not serve

    3. Serve immediately, then execute the program

    4. Finish the current command, then serve the interrupt, and finally return to the execution of the program

  3. Question 3. Computer Von Newmanm is a computer

    1. There is a processor, execute sequential commands

    2. Can execute multiple commands at the same time

    3. Follow the program located inside the memory

    4. Both a and c

  4. Question 4. The ENIAC computer is a computer:

    1. Ordered by the US Department of Education

    2. The computer was born in the 1970s

    3. Use small and medium sized microchips

    4. The first computer in the world

  5. Question 5. For development signals, the following statement is wrong

    1. MEMR is the command read signal from memory

    2. MEMR is the command read signal from memory

    3. IOR is the signal reading data from the input and output port

    4. IOW is a data logging signal to the gateway

  6. Question 6. Which of the following statements is true?

    1. INTR is a solid signal

    2. INTR is a soft interrupt signal

    3. INTR is a hard interrupt signal that cannot be blocked

    4. INTR is an exception interrupt signal

  7. Question 7. Which of the following statements is wrong?

    1. INTA is the CPU signal that responds to accept interrupts

    2. INTA is the signal sent from the external processor

    3. INTA is an external signal that requires a CPU shutdown

    4. Both a and b are correct

  8. Question 8. Which of the following statements is true?

    1. HOLD is the CPU response signal to the outside

    2. HOLD is not a control signal

    3. HOLD is the interrupt control signal

    4. HOLD is the signal from the external CPU to give the bus

  9. Question 9. Which of the following statements is true:

    1. HLDA is a CPU signal that accepts a bus

    2. HLDA is a CPU signal that does not accept a bus

    3. HLDA is the signal that requests the CPU to give up the bus

    4. HLDA is a software interrupt

  10. Question 10. So far, computers have evolved over many generations:
    1. 5
    2. 4
    3. 3
    4. 2
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