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Point to the SEGMENT address of the memory cell in the target data segment
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Point to the SEGMENT address of the memory cell in the target data segment
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Point to the memory OFFSET address in the data segment
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Point to the OFFSET address of the data segment
Test about computer architecture P6
Computer architecture is to design the basic concept and operational structure of a computer system. Please join the Network Administrator to learn about this topic through multiple choice questions below.
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Question 1: In 16 bits processing architecture. What does the DS: DI register pair do?
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Question 2: In 16 bits processing architecture. What does the DS: SI register do?
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Point to the memory cell SEGMENT address in the source data segment
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Point to the SEGMENT address of the memory cell in the target data segment
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Point to the memory OFFSET address in the data segment
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Point to the OFFSET address of the data segment
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Question 3: The function of the ALU in 16bits microprocessor architecture is:
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Perform decoding
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Implementing LOGIC and MATHEMATICS calculations
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Perform command counting
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The command cache structure in the decoding process
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Question 4: The function of the ID block in the processor architecture is 16bits:
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Perform command counting
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Implementation of LOGIC and arithmetic operations.
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Perform decoding
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The command cache structure in the decoding process
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Question 5: The function of the EU in 16bits microprocessor architecture is:
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Execute the decoded commands
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Decode the commands read from memory
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Perform LOGIC calculations
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Perform arithmetic operations
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Question 6: The function of CU block in 16bits microprocessor architecture is:
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Perform arithmetic operations
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Perform LOGIC calculations
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Decode the commands read from memory
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Take control of reading commands and data
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Question 7: Which register group has the function of paragraph segment among the following groups:
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SI, DI, IP
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CS, DS, ES, SS
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AX, BX, CX, DX
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SP, BP, FLAGS
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Question 8: Which register group has common functions among the following groups:
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CS, DS, ES, SS
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SI, DI, IP
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AX, BX, CX, DX
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SP, BP, FLAGS
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Question 9: The RD / WR signal in the CPU controller of the CPU has the function:
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Control reading / writing data
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Control data decoding
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Control command counting
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Control the CPU hanging
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Question 10: A memory box in the process of processing data is conceived of in size:
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8 bits
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16 bits
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20 bits
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24 bits
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5 ★ | 2 Vote
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