B: Write data to memory.
C: Read the memory address in memory.
D: Signal read data from a memory cell in memory.
Question 2 : In architecture processing 4 bits. What does MAR register do?
A: Read the memory address in memory
B: Write data to memory.
C: Read data from memory cells in memory.
D: Signal read data from a memory cell in memory.
Question 3 : BUS types used in digital input / output architecture are:
A: All 3 types of BUS: Data, address, control
B: BUS address
C: BUS controls
D: .BUS data.
Question 4 : What type of BUS is responsible for controlling data read / write signals between microprocessor chip and memory:
A: BUS controls.
B: BUS address.
C: BUS data
D: BUS address and BUS controller.
Question 5 : Which BUS type is responsible for reading / writing data between microprocessor chip and memory:
A: BUS data.
B: BUS address.
C: BUS controls.
D: BUS address and BUS controller.
Question 6 : In computer architecture 4 bits. Which block does the command cursor task.
A: ID block
B: MBR block
C: MAR block
D: CU block
Question 7 : In 16 bits processor architecture. Which pair of registers manages STACK operation
A: SS: SP
B: CS: IP.
C: BP: SP
D: DS: SI
Question 8 : In 16 bits processor architecture. What is the SP register doing?
A: Point to the top of STACK.
B: Point to the bottom of STACK.
C: Point to the cursor address.
D: Point to the OFFSET address of the command.
Question 9 : In 16 bits processor architecture. What does the IP register do?
A: Point to the OFFSET address of the command.
B: Point to the bottom of STACK.
C: Point to the cursor address.
D: Point to the top of STACK.
Question 10 : In 16 bits processing architecture. What does the CS: IP register pair do?
A: Point to the SEGMENT address of the cell in the command.
B: Point to the OFFSET address of the command.
C: Point to the SEGMENT address of the cell in the data segment.
D: Point to the OFFSET address of the data segment.
Answer:
1. A
2 A
3. A
4. C
5. A
6. D
7. C
8. A
9C
10. A
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